Meet the Team
Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.
Your Impact
- Implementation of DV infrastructure for block, cluster, and TOP-level environments.
- Maintaining existing DV environments and enhancing them.
- Ensuring complete verification coverage through implementation and review of code and functional coverage.
- Working closely with architects and designers to ensure verification completeness.
- Supporting tests done with emulation.
- Engage in tasks to prepare for post-silicon-validation.
Minimum Requirements:
- 5+ years’ experience in digital logic design verification
- Advanced knowledge of SystemVerilog and UVM
- Advanced debug skills pre-silicon and in-lab
Preferred Requirements:
- Scripting abilities
- System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU)
- Basic SW knowledge (chop driver level)
- Basic design knowledge