Junior ASIC Design Engineer

HDL Design House delivers leading-edge digital, analog, and back-end design and verification services and products in numerous areas of SoC and complex FPGA designs. 

Why we need you:

To help us make a SoC (System on a chip) chip that changes the world.

Who can apply:

• Candidates with formal education, M. Sc. or B. Sc. degree in Electronics, Informatics, Computer Science, Automatic, Telecommunications or Electrical engineering.

Your Responsibilities:

• Involvement in all stages of complex ASIC / FPGA SoC design including functional specification development, microarchitecture development, RTL design, synthesis, equivalence checking, and timing sign off.

What you'll bring:

• Knowledge of C/C++
• Basic knowledge of digital electronics
• Basic knowledge of ARM CPU System Architecture
• At least B level of English language (spoken and written)

Bonus points if you are:

• Familiar with scripting tools and languages (e.g. bash, csh, awk, Perl).
• Familiar with software/hardware development tools (e.g. make and versioning tools (e.g. CVS/SVN)).
• Familiar with complex flows for System-on-Chip projects using Cadence/Synopsys/Mentor Graphics EDA tools 

and have:

• ASIC/FPGA SoC design experience using Verilog and VHDL
• In-depth knowledge of CPU/MCU Architecture
• Experience with RTL development, synthesis, optimization, and timing closure
• Experience in logic equivalence checking
• Experience in DFT/ATPG
• Experience with the implementation technologies below 90nm/CMOS

Why to choose to work for HDL Design House:

• Comprehensive trainings for Juniors from experts for design/analog/verification of ASIC/FPGA System-on-Chip
• Permanent employment
• Private health insurance
• Opportunity to be part of many sports activities: football, basketball, volleyball …
• Team building gatherings, traveling, and parties.
• English classes
• Company sponsored trainings, domestic and international conferences, workshops, and education